An Efficient Architecture for 8-point Discrete Cosine Transform using Less Number of Multipliers

Authors

  • Reeta Choudhury, Sudhansu Sekhar Nayak

Abstract

In this paper, a simple architecture has been presented for direct implementation of 8-point discrete
cosine transform (DCT). This architecture is suitable for VLSI implementation and it provides high
throughput of computation. Since the architecture uses minimum number of multipliers, its area-and
hardware-complexities are less. Its VLSI performance is good. Sub expression sharing technique and
sharing the multipliers with same constants have been used in this architecture.

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Published

2020-11-03

How to Cite

Reeta Choudhury, Sudhansu Sekhar Nayak. (2020). An Efficient Architecture for 8-point Discrete Cosine Transform using Less Number of Multipliers. PalArch’s Journal of Archaeology of Egypt / Egyptology, 17(9), 2091 - 2095. Retrieved from https://www.archives.palarch.nl/index.php/jae/article/view/4113